1. Field of the Invention
The present invention relates to a dry etching method employed in such applications as production of semiconductor devices. More particularly, it relates to a dry etching method whereby high anisotropy can be achieved while providing sidewall protection effects by using an appropriate alternative substance to carbonaceous polymers. Further, the present invention relates to a dry etching method whereby generation of etching residues or attachments, deformation of the sectional shape of patterns, and other problems can be prevented, for instance, in a multi-level metallization process involving a large-scale over-etching process for metallization layers on wafers having large steps on the surface thereof.
2. Description of the Related Art
The recent trend toward larger-scale integration and higher performance of such semiconductor devices as VLSIs and ULSIs requires dry etching methods whereby correspondingly higher anisotropy, higher etchrate, higher selectivity, lower pollution, and less damage can be achieved with no compromise in these requirements in etching silicon based material layers such as single-crystal silicon, polysilicon, refractory metal silicide, and polycide layers, or aluminum based material layers.
A typical etching process for single-crystal silicon based layers is a trench forming process wherein a trench is formed for the purposes of isolating minute elements and securing cell capacitor areas. This process requires high anisotropy in order to allow filling of the trench in subsequent processes and accurate control of capacitance.
Meanwhile, a typical etching process for polysilicon, amorphous silicon, refractory metal silicide, and polycide layers is a gate electrode forming process wherein a pattern width directly affects a channel length in self-aligned formation of a transistor's source and drain regions and a sidewall size accuracy in an LDD structure. As such, this process also requires high anisotropy together with high selectivity for thin gate oxide films.
Further, a typical etching process for aluminum based material layers is, needless to say, a interconnection forming process. A problem peculiar to this process is how to prevent after-corrosion.
The recent trend toward three-dimensional device structures and resulting expansion of steps on the surface of a target wafer requires a large-scale over-etching process. Namely, if the steps expand, it is more likely that various material layers formed thereon become irregular in thickness and that wafer surface morphology effects work to decrease the quantity of etchant incident on such narrow sections as the bottoms of the steps and lower the vapor pressure on etching reaction products. Consequently, after completion of a just-etching process, etching residues called stringers sometimes remain on the bottoms of the steps and require removal in an over-etching process.
It is generally difficult in an over-etching process, however, to make high anisotropy compatible with high selectivity because an excessive quantity of radicals relative to an etching area cause migration on the surface of a target wafer and attack the sidewalls of patterns, deforming the sectional shape of patterns. Meanwhile, any attempt to set ion assisted etching conditions for fear of lower anisotropy causes damage to underlying layers or allows sputtered underlying layers to attach to the sidewalls of patterns. It is preferable to prevent generation of such attachments, which will occlude residual chlorine and promote after-corrosion, particularly when etching aluminum based material layers formed on silicon oxide (SiO.sub.2) based inter-layer insulation films.
Conventionally, sidewall protection effects using carbonaceous polymers have played a major role in solving the above-mentioned problems.
Chloroflurocarbon (CFC), typically, CFC 113 (C.sub.2 Cl.sub.3 F.sub.3), has been widely used to etch silicon based material layers. CFC gas has fluorine (F) and chlorine (Cl) atoms in each molecule thereof and will generate, under certain conditions, such radials as F.sup.* and Cl.sup.* and such ions as C.sup.+, CF.sub.X.sup.+, CCl.sub.x.sup.+, and Cl.sup.+, both of which will assist an etching reaction. When the CFC gas is dissociated by electric discharges, the resulting fragments thereof will polymerize to form in a plasma carbonaceous polymer, which will deposit on a pattern sidewall on the surface of a target wafer, providing sidewall protection effects and thereby achieving high anisotropy.
It is possible to make high anisotropy compatible with high selectivity by improving the sidewall protection effects provided by the carbonaceous polymer. The principle of this method is to reduce the energy of incident ions with no compromise in a practical etchrate and thereby achieve high selectivity while preventing the resulting anisotropy deterioration by improving the sidewall protection effects. A typical example of this method is publicized in, for instance, the Extended Abstract of the 36th Spring Meeting of the Japan Society of Applied Physics and Related Societies, 1989, p. 571, 1p - L - 5. In this instance, a tungsten polycide film is etched via an SiO.sub.2 mask by C.sub.2 Cl.sub.3 F.sub.3 (CFC 113) / SF.sub.6 mixed gas.
For Al based material layers, a carbonaceous polymer supplied by a resist mask provides sidewall protection effects. To etch Al based material layers , chlorine based gases , typically, BCl.sub.3 /Cl.sub.2 mixed gas, have been widely used. Because Al and Cl react with each other spontaneously, a mean free path of ions must be extended during etching under low gas pressure and high bias in order to ensure high anisotropy. When the resist mask is sputtered by high-energy incident ions, the resulting decomposition products will form a carbonaceous polymer, which will deposit on a pattern sidewall, providing sidewall protection effects.
Another method for achieving high anisotropy has also been proposed wherein the temperature of a target substrate (wafer) is reduced instead of providing sidewall protection effects by using the carbonaceous polymer. Called low-temperature etching, this method is designed to keep the wafer at temperatures below 0.degree. C. and thereby keep a longitudinal etchrate at a practical level with the assistance of ions while freezing or inhibiting a radical reaction on the sidewalls of patterns and preventing such etching defects as undercut. A typical example of this method is publicized, for instance, in the Extended Abstract of the 35th Spring Meeting of the Japan Society of Applied Physics and Related Societies, 1988, p. 495, 28a - G - 2. In this instance, a silicon trench and an n.sup.+ type polysilicon layer are etched by using SF.sub.6 gas with a wafer cooled to -130.degree. C.
In this connection, it is to be noted that low-temperature etching in the broad sense thereof sometimes means a dry etching method wherein a wafer is kept at room temperature, considering that the wafer, unless cooled, will be heated to temperatures around 200.degree. C. under the influence of radiation from a plasma or heat of reaction.
However, it has been pointed out that the above-mentioned methods of providing sidewall protection effects by using a carbonaceous polymer involve problems described below.
Firstly, CFC gas, typical of etching gases for silicon based material layers, is commonly known to contribute to destruction of the earth's ozone layer and the production and use thereof are likely to be prohibited in the near future. Under these circumstances, there is pressing need to find some appropriate alternative substance, and the efficient applications thereof, to CFC gas for use in dry etching.
Secondly, when silicon based material layers are etched by using CFC gas, carbon contained therein deteriorates selectivity for SiO.sub.2 based material layers. This problem is publicized in, for instance, the Extended Abstract of the 36th Spring Meeting of the Japan Society of Applied Physics and Related Societies, 1989, p. 572, 1p - L - 7 and the Monthly Journal "Semiconductor World" (published by the Press Journal Inc.), January, 1990, p. 81-84. In these instances, carbon contained in CFC gas adsorbs on the surface of an SiO.sub.2 based material layer like a gate oxide film to form a C--O bond with a high bond energy (257 kcal / mole) and weaken an Si--O bond or to reduce SiO.sub.2 to Si and make it more likely to be extracted by a halogenous etchant. This problem becomes particularly serious in forming a gate electrode on a thin gate oxide film.
Thirdly, there is a fear that a carbonaceous polymer may cause particle pollution and after-corrosion. Namely, it is most likely that a carbonaceous polymer occurring from the gaseous phase causes more serious particle pollution as design rules for semiconductor devices become more strict in the future. Particularly, in an etching process for Al based material layers, a carbonaceous polymer deposited on the sidewalls of patterns will occlude chlorine or compounds thereof, which will act as residual chlorine to promote after-corrosion. In recent years, an increasing number of electromigration prevention measures, such as adding copper (Cu) to Al based material layers and fabricating therewith such dissimilar material layers as barrier metals and anti-reflection films have been taken. Since all these measures work against after-corrosion prevention, it is required to find some appropriate alternative sidewall protection substance to a carbonaceous polymer.
There have also been proposed some measures for using other depositional gases than CFC gas. As design rules for semiconductor devices become more strict in the future, there is a greater fear that even minute particles which would otherwise be negligible may lead to considerable yield reduction.
On the other hand, low-temperature etching is expected to be one of promising CFC-free etching methods. As mentioned above, however, this method attempts to achieve high anisotropy only by freezing or inhibiting a radical reaction on the sidewalls of patterns and involves cooling a target substrate (wafer) to such a degree that requires liquid nitrogen. Hence, hardware related problems, such as increased demand for large-scale special cooling equipment and decreased reliability of vacuum sealant. Also anticipated is the fear that additional time taken to cool the wafer below room temperature and heat it back to room temperature leads to reduction in throughput as well as economy and productivity.